Dramatically decrease analysis efforts with efficient application of quality, safety, reliability and cybersecurity analysis methods at the system, item, software, hardware and PCB levels.
High Level Features
Ansys safety & cybersecurity threat analysis software facilitates model-based safety analysis, safety concept creation, safety management and cybersecurity assessment for safety-critical electrical and electronic (E/E) and software (SW) controlled systems.
Using this software, engineers can deliver safe and secure products, reduce time to market, maximize profit margins and comply with standards like ISO 26262, IEC 61508, ARP 4754A/ARP 4761, ISO 21448 and ISO 21434.
Release Date: July 2022
In Ansys 2022 R2, Ansys Medini analyze provides new features that further extend and complete the efficient holistic application of safety, reliability, and cybersecurity analysis methods in a high-performance manner.
Our A&D customers benefit from improved quantitative fault tree analysis at the highest performance level. Furthermore, with Ansys 2022 R2 we offer componentized fault-tree logic embedded in design models with Component Fault Trees. This significantly reduces the effort of defining fault-trees for huge modular designs while at the same time increasing consistency and quality of such fault trees.
In the Automotive domain, we have extended the FMEA capabilities to support hybrid-failure nets as required by the VDA-AIAG FMEA standard. The integration with design models has also been extended to increase reusability in the design process.
Hybrid-failure net for mitigated effect modelling in the Monitoring and System Response FMEA
Inheritance of failure modes to consistently build analysis models based on SysML v2
New high-performance FTA algorithm for aircraft-level fault tree computations
Component Fault Trees (CFT) support to model fault logic embedded in SysML (BETA version only)
Improvements to the Cybersecurity automation features for risk analysis
UNECE R.155 catalog for cybersecurity assessment
Ansys implements key safety analysis methods in one integrated tool. It supports the efficient and consistent execution of the analysis activities that are required by safety standards.
Ansys carries out a system-oriented cybersecurity analysis strategy to quickly identify vulnerabilities and design weaknesses and address them to mitigate any real-world threats.
Ansys supports key safety analysis methods at various levels of a chip, ranging from IP Design of integrated components, up to SoCs and electronic boards.
By acting as a central hub for gathering data, managing resources, planning and automating many process steps, Ansys enables a comprehensive view on safety.
The Ansys Safety Analysis software suite streamlines safety and security analysis, decreasing efforts and costs.
During system design, safety analyses (HAZOP, HARA, FHA, FTA, FME(C)A, FMEDA, etc.) are applied to verify that the design is safe. This enables full traceability, consistency and automation of previously time-consuming and error-prone manual tasks. Necessary documentation of the safety case is generated by the tool.
Ansys medini analyze enables the systematic identification of SOTIF risks in the hazard and risk analysis stage, as well as the consideration of design limitations and triggering conditions. Once these are identified, countermeasures can be planned to meet safety requirements. These measures and requirements are traced in Ansys medini analyze to the functional or architectural updates that are completed during the implementation of the system. Ansys medini analyze provides analysis methods like cause-effect-nets, System Weakness Analysis tables, and event trees, which make systematic analysis, understanding and elimination of SOTIF hazards possible.
This enables diverse teams — working to meet functional safety and SOTIF standards across system, electronics, embedded software, and other areas — to collaborate easily and more seamlessly.
This model-based, integrated tool provides end-to-end traceability, along with powerful collaboration, task management and reporting capabilities.
Ansys medini analyzes capabilities for semiconductors facilitate the process of mapping blocks of the semiconductor design to system components. Furthermore, it determines failure rates for the overall chip design and distributes it according to criteria, as die area occupation or gate count to the functional blocks. In a subsequent step, a Failure Mode, Effects and Diagnostics Analysis (FMEDA) can be done to evaluate the overall design with respect to the coverage rates of failure modes by safety mechanisms. In this manner, engineers can quickly identify any design weaknesses in semiconductors, whether caused by design errors or environmental conditions, and address them to mitigate the impact on day-to-day safe performance.
Ansys Digital Safety Manager recognizes and reflects the way safety teams work every day, not only internally but with their suppliers, assessors, and reviewers. It improves efficiency with traceability and standardization to enable systematic and consistent reuse of safety plans and work products.
Safety is a crucial property for many products, especially in the aerospace and defense industry, essential to obtaining the necessary certification. To identify appropriate safety requirements early in the development process and to be able to demonstrate their fulfillment by design, safety analysis must be well integrated into the system development process in all phases. In a model-based approach that is usually highly iterative, it's a great benefit to base the safety analysis on models. This allows us to deal with changes quickly and always have up-to-date analysis to guide development decisions.